A data processing system (DPS) may include hardware and software components. The hardware components may include a processor, random access memory (RAM), and nonvolatile storage (NVS). The software components may include many different kinds of computer programs. The DPS may run the software components by copying them from the NVS to RAM and then executing them on the processor.
A processor may be described in terms of its design architecture and in terms of its instruction set architecture (ISA). Conventional processors typically follow the von Neumann architecture, the Harvard architecture, the modified Harvard architecture, or similar architectures. According to any such architecture, the design architecture for the processor or processing unit may include an arithmetic logic unit and a control unit, with the control unit containing a program counter. To start executing a program, the address of the first instruction in that program is loaded into the program counter. The processor then fetches the instruction at that address, executes that instruction, and increments the program counter to point to the next sequential instruction in the program. The processor may repeat this fetch cycle until the last instruction of the program has been executed. However, the program may use a control transfer instruction (e.g., a branch instruction) to alter the execution sequence. A control transfer instruction may also be referred to as a “control flow instruction.” For instance, a branch instruction (or another control flow instruction) may cause the processor to replace the content of the program counter with the address of an instruction other than the next sequential instruction. Additionally, a control flow instruction may make modification of the program counter conditional on the truth of some assertion (e.g., branch if the content of a specified register does not equal zero). Consequently, the program may execute different sequences of instructions under different conditions. Some common control flow instructions include conditional instructions (e.g., if then else) and loop instructions (e.g., for, while).
For purposes of this disclosure, a computer instruction for directly controlling or altering the flow of control may be referred to as a “control flow instruction.” Many different languages provide for many different kinds of control flow instructions. A small sample of control flow instructions includes, without limitation, instructions such as (a) if then else (b) for (c) while (d) branch, (e) branch if equal.
Similarly, computer language that includes control flow instructions may be referred to as a “control flow language,” and a computer program that is implemented or written in a control flow language may be referred to as a “control flow program.” Likewise, a processor that supports one or more control flow languages or programs may be referred to as a “control flow processor” and as having a “control flow architecture.”